CY2DL814 buffer equivalent, 1:4 clock fanout buffer.
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* Low-voltage operation VDD = 3.3V 1:4 Fanout Single-input configurable for — LVDS, LVPECL, or LVTTL — Four differential pairs of LVDS outputs Drive.
the fanout from a single input reduces loading on the input clock. The CY2DL814 is ideal for both level translations fr.
The Cypress CY2 series of network circuits is produced using advanced 0.35-micron CMOS technology, achieving the industry’s fastest logic. The Cypress CY2DL814 fanout buffer features a single LVDS-, LVPECL-, or LVTTL-compatible input and four LVDS ou.
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